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Minimize SWaP-C in Aerospace Imaging

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Unmanned Aerial Vehicles (UAVs) are proving vital in military and security activities around the globe, allowing prolonged surveillance in hostile areas with no risk of human lives. The UAV electronics package must implement complex image-processing algorithms, yet must be minimized in size, weight, power, and cost (SWaP-C). Until now, the image-processing workloads have required power-hungry and heat-generating DSPs and a dedicated microprocessor. But 3rd generation Intel® Core™ processors, formerly code-named Ivy Bridge, provide the horsepower needed for the imaging tasks and can reduce bill of materials, size, weight, and the heat generated by the electronics.

A UAV has two disparate compute-intensive complexes. One is the flight computer that controls navigation and airframe control surfaces, and the second is oriented to imaging targeted at the surveillance nature of the UAV application. We will discuss the flight subsystem later in this article because the latest Intel® architecture processors now have the potential to perform that task. But first let’s consider the imaging subsystem.

The imaging subsystem includes one or more cameras and the electronics needed to capture frames from the camera, preprocess the image data, encrypt the data to prepare it for transmission to the ground, and transfer the data to the flight subsystem for the ground transfer.

Every element in the image chain is both complex in terms of the computational power needed for the task at hand, and bandwidth challenging in terms of the real-time stream of rich imaging data that flows constantly through the subsystem.

Image Processing Elements
Let’s look in a little more detail at the individual elements of the image processing task. For each frame of data, the system must capture the data into memory over a high-speed link to the camera. Today’s UAVs typically capture data at resolutions such as 720 pixels by 480 lines. At this resolution, a system that captures data at 30 frames per second (fps) must handle more than 10 Megapixels/sec. Assuming an 8-bit pixel depth, each uncompressed frame requires more than 10 MB of memory. Moreover, many UAV buyers demand greater pixel depth and the near-term goal for many is full 1080p HD resolution.

Once the frame is stored, the imaging subsystem typically performs preprocessing functions. For example it may execute a sharpening algorithm for each captured frame. Sharpening improves the ability of subsequent algorithms to detect edges and other elements in the image.

Ultimately, UAV handlers on the ground will make critical decisions about the data captured by the UAV. However, the vehicle itself needs some level of autonomy to make real-time decisions, so the image-processing system must include algorithms to detect and track targets. Typically the algorithm would isolate a section of the image where a target stands out relative to the surrounding landscape. Then the system would employ an algorithm to classify the object based on comparison with models of high-value targets stored in the system memory.

Ultimately the system must encode the video before it can be transmitted to the ground. So the image processing system must support a compressed-video codec such as MPEG, and that codec must deliver a real-time compressed data stream to the ground.

Next the imaging system must encrypt the data that needs to be transmitted to the ground. Unauthorized agents could easily eavesdrop on the wireless transmission, but encryption ensures that only the UAV handlers can decode and utilize the data. Finally the data must be handed over to the flight computer for transmission. All of the steps happen continuously in real time on every data frame.

Figure 1 shows a block diagram of a typical current-generation UAV system. The imaging subsystem is in the left half of the diagram. The right side of the diagram shows the flight subsystem. The details in Figure 1 are based on an existing design from a UAV manufacturer with which VersaLogic is engaged on a next-generation project. The legacy implementation combines an embedded microprocessor, two dedicated DSPs, and a custom frame grabber, just to implement the functionality required in the imaging system.

Figure 1. A typical UAV electronics package has both a flight-control subsystem (right), and an imaging-oriented subsystem (left) focused on the surveillance task.

Size, Weight, and Power Limits
While the design in Figure 1 has been successfully deployed, there are numerous areas in which a UAV electronics package could be improved – especially relative to optimizing SWaP-C. For starters, the multi-processor design typically requires multiple small circuit boards. Those boards, and the card cage that hosts the boards, adversely impacts size and weight. Moreover, UAVs have a strictly constrained power budget – and the multiple processors, each with dedicated memory, result in a high-power design.

But the problem doesn’t stop there. The higher power consumption generates heat, which must be mitigated for reliable operation. Typically the multi-processor approach will require active cooling with a combination of heat sinks and fans. The cooling system adds more weight and consumes more power.

3rd Generation Intel® Core™ Processors
The 3rd generation Intel Core processors offer features that promise significant improvements in all areas. The new features, combined with innovations from earlier microarchitectures, will allow Intel architecture-based, commercial off-the-shelf technology (COTS) platforms to maximize performance and optimize SWaP-C in the UAV application.

For the UAV application, the most important features are the improved performance and I/O bandwidth. The latest Intel® Core™ processors offer up to a 15% performance gain in the processor core relative to prior-generation processors while maintaining the same power footprint. The combination means that the 3rd generation Intel Core processors can take on more image-processing tasks without creating power or heat issues in a UAV.

For moving data faster, the latest-generation platform includes support for USB 3.0 and PCI Express* (PCIe*) Gen 3, both capable of faster data transfers. USB 3.0, for instance, raises transfer rates from 480 Mbps to 5 Gbps, and is capable of supporting the HD cameras that UAV operators prefer. PCIe Gen 3 enables a doubling of per-lane throughput to 1 Gbps. The faster expansion bus allows for high-speed interfaces to application-specific interconnects such as CAN or the 1553 Military Avionics bus.

Getting back to CPU performance, let’s consider how the new processors can be used in UAV applications. The new processors are equipped with the Intel® Advanced Vector Extensions (Intel® AVX) single instruction multiple data (SIMD) hardware and instruction set. Intel AVX brings math capabilities commensurate with dedicated DSPs to Intel processors. A single 3rd generation Intel Core processor has the potential to replace the multiple processors including the DSPs depicted in Figure 1.

These capabilities are enhanced by Intel® Turbo Boost Technology, which allows a temporary boost of clock frequency to handle peak-processing loads. In addition, Intel® Hyper-Threading Technology (Intel® HT Technology) allows each of the processor cores to handle two threads. The combination of maximizing peak performance on a core and offering support for multithreaded parallel tasks is vital in the UAV application.

For the UAV data-encryption task, the Intel® AES New Instructions (Intel® AES-NI) include inherent support for the task of encrypting sensitive data for transmission over wireless links. The instructions support the AES encryption standard and significantly reduce the number of processor cycles dedicated to encryption, freeing the processor for other tasks.

VersaLogic’s UAV Approach
VersaLogic has engaged with a customer on a next-generation vertical take-off and landing (VTOL) UAV design with plans to replace the functionality in Figure 1 with a single-board computer (SBC) based on a quad-core 3rd generation Intel® Core™ i7-3615QE processor. As with all UAVs, space and power budget will be at a premium in the VTOL application, and the imaging and flight-control requirements are similar to other UAV designs.

The UAV maker is testing a system represented by Figure 2. A single Intel Core i7-3615QE processor on the VersaLogic EBX-41 Copperhead SBC handles the frame grabber functionality, all of the image processing tasks, video encoding, encryption, and transfer to the flight computer.

Figure 2. A VersaLogic single-board computer implements the functionality that previously required a frame-grabber board, a general-purpose-processor board, and two DSP boards.

A key element of the new system was implementation of the DSP-centric image-processing and video-encoding tasks. The software architects had ported this code to Microsoft* Windows* some time ago for testing and validation purposes. The processing capabilities of the 3rd generation Intel Core processor create new possibilities for deploying this code. Rather than implementing it on multiple DSPs using specialized real-time operating systems (RTOSs), the simulation code can now be deployed directly on a single 3rd generation Intel Core processor using Microsoft* Windows* Embedded Standard 7. This novel approach enabled quick time-to-market using existing code without a re-write.

There are numerous advantages to the Intel approach. From a development perspective, having the development platform based on Microsoft Windows and the airframe based on Microsoft Windows Embedded results in significant efficiency gains in the development and debug cycle. Moreover the fact that the development host and target are both based on Intel architecture brings additional efficiency to the development process. Design teams have access to a myriad of third-party tools and software libraries and no cross compiling or development is required.

COTS Approach
The use of COTS in the form of the EBX-41 board accelerated the development cycle and reduced cost. The EBX-41 (Figure 3) integrates a 2.1 GHz, quad-core processor and is designed for high-reliability and ruggedized environments.

Figure 3. The VersaLogic EBX-41 Copperhead board integrates a quad-core Intel® Core™ i7-3517UE processor with a TDP of 17 W and high-performance I/O including USB 3.0 and mSATA.

Using a 3rd generation Intel Core processor in the imaging systems reduces the board count from seven boards to three. The reduction means that the thermal design can rely on a heat plate connected via a heat pipe to the skin of the UAV rather than the fans used in previous designs. It also means savings in every axis of SWaP-C.

The EBX-41 includes a number of other features that further compound SWaP-C savings and/or offer the option of extended functionality. For example, the board is based on a 12 V power-distribution architecture that simplifies integration into the UAV electronics package. There’s an integrated A/D converter that can enable monitoring of the power system. A Mini PCIe socket enables connectivity to other interfaces. Onboard mSATA support could connect to a solid-state disk drive for storage of flight profiles. And an integrated Trusted Protection Module (TPM) can protect cryptographic keys.

Adding Flight-subsystem Support
The 3rd generation Intel Core processors can offer an even greater upside as UAV designers rethink the structure of the imaging and flight-control subsystems, and introduce new requirements. For example, UAV designers are moving to multiple-camera designs that will require simultaneous video feeds and processing channels. PCIe Gen 3 could allow a single processor to link to multiple video sources for multi-camera applications.

The latest Intel Core processors also have the processing cycles needed to take over the tasks that are now implemented in the flight-computer subsystem. A potential system design is depicted in the block diagram in Figure 4. The flight computer will always require a secondary redundant control system for reliability, but a single 3rd generation Intel Core processor can handle the imaging tasks and the primary flight-control tasks. A design like the one in Figure 4 would deliver significant additional SWaP-C advantages.

Figure 4. The 3rd generation Intel® Core™ processors have the processing power needed to handle both the surveillance-oriented imaging subsystem and the flight-control subsystem in a UAV application.

There may be even more processor cycles to tap in a headless application such as a UAV where the graphics processor integrated into 3rd generation Intel Core processors isn’t required for the graphics tasks. Indeed Intel now allows external access to the graphics core via APIs such as OpenCL that is designed to abstract programming of parallel heterogeneous compute resources. We will have to see how use of the graphics processor unfolds, but some imaging-centric tasks could be spread across general-purpose and graphics cores.

Efficient design for SWaP-C-constrained UAVs
The 3rd generation Intel Core processors can provide immediate SWaP-C benefits to aerospace applications such as UAVs. A single Intel Core processor can consolidate the tasks that have been spread across multiple compute resources on multiple boards. Moreover, the move to Intel Core processor-based systems simplifies the software development task and unifies the development and target environments. Aerospace design teams also have one more reason to consider a transition to Intel architecture: The ramp in performance and imaging-oriented processing capabilities will only escalate going forward with Intel architecture. For future designs, teams can move proven code forward and immediately take advantage of the latest Intel hardware advances.

VersaLogic Corporation is a General member of the Intel® Intelligent Systems Alliance and a leading provider of rugged industrial computers to OEMs for embedded control and industrial control applications.

Visual processing applications like industrial inspection and traffic monitoring require high performance in a small thermal footprint – a tough combination to achieve. The 3rd generation Intel® Core™ processor meets this challenge by combining new power-saving features with increased graphics, computing, and I/O throughput.

The use of virtualization in security- and reliability-critical applications like mil/aero has been hindered by the limitations of traditional hypervisors. A new “Type 0″ hypervisor addresses these issues with a minimized architecture that provides a smaller attack surface and more reliable operation. This new architecture also has the flexibility to use any OS as well as bare-metal applications.

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